1. Field of the Invention
The present invention relates to construction of a semiconductor integrated circuit and a method of manufacturing the same.
2. Background of the Invention
FIG. 7 is a sectional view showing a first background-art semiconductor integrated circuit, in which a plural number of transistors are arranged on one substrate. In FIG. 7, reference numeral 1 designates a semiconductor substrate, reference numerals 2 and 3 designate a first transistor and a second transistor, respectively, and reference numerals 4 and 5 designate one of the electrodes of the first transistor and one of the electrodes of the second transistor, respectively. The electrodes 4 and 5 of the transistors 2 and 3 are connected to each other by means of metallic wiring and the like, formed by sputtering and the like, to constitute a semiconductor integrated circuit.
FIG. 8 is a sectional view showing a second background-art semiconductor integrated circuit. In this semiconductor integrated circuit, a semiconductor region is formed on a semiconductor substrate and another semiconductor layer, and one transistor are formed on the semiconductor substrate and another transistor is formed on the semiconductor region. In FIG. 8, reference numeral 11 designates a semiconductor substrate and reference numeral 12 designates a semiconductor region (well) formed as another semiconductor layer on the top surface of the semiconductor substrate 11, reference numerals 13 and 14 designate a first transistor formed on the semiconductor substrate 11 and a second transistor formed on the semiconductor region 12, respectively, and reference numerals 15 and 16 designate one of the electrodes of the first transistor 13 and one of the electrodes of the second transistor 14, respectively. The electrodes 15 and 16 of the transistors 13 and 14 are connected to each other by means of metallic wiring and the like, formed by sputtering and the like, to constitute a semiconductor integrated circuit.
FIG. 9 is a sectional view showing a third background-art semiconductor integrated circuit. In this semiconductor integrated circuit, a semiconductor region is formed on a semiconductor substrate as another semiconductor layer, and one transistor is formed on the semiconductor substrate and another transistor is formed on the semiconductor region. In FIG. 9, reference numeral 21 designates a semiconductor substrate having a partially recessed part, reference numeral 22 designates a semiconductor region (well) formed as another semiconductor layer in the recessed part of the semiconductor substrate 21, reference numerals 23 and 24 designate a first transistor formed on the semiconductor substrate 21 and a second transistor formed on the semiconductor region 22, respectively, and reference numerals 25 and 26 designate one of the electrodes of the first transistor 23 and one of the electrodes of the second transistor 24, respectively. The electrodes 25 and 26 of the transistors 23 and 24 are connected to each other by means of metallic wiring and the like, formed by sputtering and the like, to constitute a semiconductor integrated circuit.
In the first background art, in which all transistors are formed on one semiconductor substrate, it is difficult to differentiate the performance and function of one transistor from the performance and function of other transistors.
In the second and third background arts, in which semiconductor regions 12, 22 (well) are provided as other semiconductor regions on the same semiconductor substrates 11, 21 where separate transistors 13 and 14, and 23 and 24 all respectively formed, it is possible to make the performance and function of the first transistors 13, 23 different to some extent from the performance and function of the second transistors 14, 24.
In the second and third background arts, however, it is very difficult to form semiconductor regions as other semiconductor layers at any desired position on the semiconductor substrates 11, 21, because of the growth of crystals, processing, and the like of semiconductor regions 12, 22. Specifically, when a GaAs layer as semiconductor regions 12, 22 is grown on Si as semiconductor substrates 11, 21, for example, there are problems such as the production of a high density of dislocations and production of cracks, at a critical film thickness or thicker due to the difference in lattice constants between the two, and this makes it extremely difficult to make good elements on GaAs layers as semiconductor regions 12, 22.